Reliability of the conductance method applied to interface trap characterization in MOS capacitors under cryogenic conditions

Details

Supervisors

Raskin, Jean-Pierre

Faculty

Ecole polytechnique de Louvain

Degree label

Master [120] : ingénieur civil électricien, à finalité spécialisée

Abstract

enThis work presents a simulation-based study of the conductance method applied to interface traps distributions implanted at the Si/SiO2 interface, in the context of RF substrates engineering. The motivation stems from the growing demand of interface passivation solutions and trap engineering compatible with CMOS process flows at cryogenic temperatures, where standard dopants such as Boron can act as efficient recombination centers, when the thermal energy kB T becomes smaller than their activation energy. A rigorous TCAD framework has been implemented in Silvaco Atlas, combined with de-embedding process for standard and high-resistivity substrate. The conductance method is applied to four impurity types covering a wide energetic spectrum, from Palladium to Boron implants, over a broad temperature range. The results demonstrate that the multi-temperature strategy enables an accurate reconstruction of the density density Dit for all the impurity types on standard substrates, with an NRMSE below 5% for deep traps. Concerning shallow traps, two main limitations are identified and quantified, (1) the compression of the accessible energy window and (2) the incomplete ionization of bulk dopants, with these effects being exacerbated for high-resistivity substrates at 35 K.