Comparaison de CPUs pour l’optimisation d’un microcontrôleur à ultra-basse consommation

Details

Supervisors

Bol, David

Faculty

Ecole polytechnique de Louvain

Degree label

Master [120] : ingénieur civil électricien

Abstract

enOver the next years, the number of connected objects will be increasing but not the available resources. A large part of these connected objects are Wireless Sensor Nodes (WSN) also called smartsensors. In the future, these WSNs will have to be totally autonomous for their energy supply by harvesting energy from the environment. The energy harvested is very small. That's why WSNs need to consume as little power as possible. In this work, we will focus on improving a WSN in terms of energy efficiency by improving the Micro Controller Unit (MCU) used by the WSN. To do this, we seek to reduce the central processor (CPU)’s power consumption. We compare different processors to identify which one is most effective in reducing power consumption without losing performance. To perform this comparison, we use the following different figures of merit to quantize a CPU: number of instructions executed per second (performance), CPU power consumption, area, code size, and number of memory accesses. The data analysis from the scientific literature and those from the suppliers shows that these data aren’t comparable with each other because the test conditions are different. That's why, in order to compare different processors, we set up a test bench based on the simulation of the processors. It uses the CoreMark benchmark. We will find in this work the architecture’s detail of this test bench and the extraction of the various figures of merit. The reference processor in this comparison work is the Cortex-M0 Design Start which is present in the current version of the ultralow power MCU developed at UCLouvain: SleepRunner. We chose to compare it with Zero-riscy and RI5CY. In the end, the Cortex-M0 has a competitor in terms of energy efficiency under certain conditions. If in a first comparison, Zero-riscy is 29% less efficient than the Cortex-M0, it becomes 21% more efficient than the latter if we perform a comparison taking into account the memory power consumption. We are in this second comparison with the same memory configuration as that of SleepRunner. On the other side, RI5CY which is designed to perform signal processing tasks isn’t at all interesting to replace the Cortex-M0. The test bench developed for this end-of-studies work is available in open source. The aim is to reuse it to extend this research work by comparing other processors or by using other benchmarks.